Precise Exceptions
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Exceptions can occur in different pipeline stages on different
instructions.
Multiple exceptions can occur in the same clock cycle.
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Supporting precise exceptions means that:
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The exception addressed first is the one associated with the
instruction that entered the pipeline first.
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The instructions that entered the pipeline previously are allowed
to complete.
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The instruction with the exception and the ones that follow are
flushed.
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The appropriate instruction can be restarted after the exception
is handled or the program can be terminated.
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