Quiz #7

Question 1		Fill in the Blank	(1 points)
	Question:	An alternative to multi-level page tables is the use of a __________ page table, which is a form of hashing scheme in which the hash table entries point to descriptors each containing a triple (page #, frame #, link to next item in the hash chain).

Question 2 Fill in the Blank (1 points)

Question: The condition where the system spends most of its time swapping data between main memory and secondary storage, to the extent that most of the CPU time is wasted waiting for the swapping device, is called

Question 3 Fill in the Blank (1 points)

Question: The expectation that program and data references within a process tend to cluster is called the principle of

Question 4 Multiple Answer (1 points)

Question: The motivations for implementing virtual memory include

more processes may be maintained in main memory
the processor may be used more efficiently, due to a higher degree of multiprogramming
a process may be larger than all of main memory
memory management is simplified

Question 5 Multiple Answer (1 points)

Question: Which of the following are advantages of segmentation in a virtual memory?

it reduces the page fault rate
it simplifies the handling of growing data structures
it allows handling larger programs
it allows programs to be altered and recompiled independently
it lends itself to sharing among processes
it lends itself to protection

Question 6 Multiple Choice (1 points)

Question: Consider the page frame table below, where the numbers are in decimal, and everything is numbered starting from zero.
page frame number virtual page number time loaded time referenced R bit M bit
0 3 20 161 1 0
1 1 60 160 0 0
2 4 130 162 1 1
3 5 26 159 0 1
Suppose a page fault to virtual page 2 has occurred. Which page frame will have its contents replaced if the Clock algorithm is used? Assume you are using the version of the clock algorithm described on pages 360-361, in which both the use and modify bits are used.

0
1
2
3
none of the above

Question 7 Multiple Choice (1 points)

Question: Consider the page frame table below, where the numbers are in decimal, and everything is numbered starting from zero.
page frame number virtual page number time loaded time referenced R bit M bit
0 3 20 161 1 0
1 1 60 160 0 0
2 4 130 162 1 1
3 5 26 159 0 1
Suppose a page fault to virtual page 2 has occurred. Which page frame will have its contents replaced if the LRU replacement policy is followed?

0
1
2
3
none of the above

Question 8 Multiple Choice (1 points)

Question: Suppose the page table for the process currently executing on the processor contains the following data, where all numbers are in decimal, everything is numbered starting from zero, all addresses are memory byte addresses, and the page size is 1024 bytes.
virtual page number valid bit page frame number
0 1 3
1 1 4
3 0 -
4 1 2
5 1 1
6 0 -
What physical address, if any, would the virtual address 2066 correspond to?

none; a page fault would occur
1042
2066
3072
4114
5138
none of the above

Question 9 Multiple Choice (1 points)

Question: Suppose the page table for the process currently executing on the processor contains the following data, where all numbers are in decimal, everything is numbered starting from zero, all addresses are memory byte addresses, and the page size is 1024 bytes.
virtual page number valid bit page frame number
0 1 3
1 1 4
3 0 -
4 1 2
5 1 1
6 0 -
What physical address, if any, would the virtual address 5138 correspond to?

none; a page fault would occur
1042
2066
3072
4144
5138
none of the above

Question 10 Multiple Choice (1 points)

Question: Consider the page frame table below, where the numbers are in decimal, and everything is numbered starting from zero.
page frame number virtual page number time loaded time referenced R bit M bit
0 3 20 161 1 0
1 1 60 160 0 0
2 4 130 162 1 1
3 5 26 159 0 1
Suppose a page fault to virtual page 2 has occurred. Which page frame will have its contents replaced if the FIFO (first-in-first-out) replacement policy is followed?

0
1
2
3
none of the above

Question 11 Multiple Choice (1 points)

Question: Given a fixed number of TLB entries, using a larger page size has the effect of

improving TLB performance
worsening TLB performance
causing more page faults
reducing the page fault rate
none of the above

Question 12 Multiple Choice (1 points)

Question: If a process only uses N pages of virtual memory, it seemingly would need only N page table entries, given a single-level paging scheme. Using a multi-level paging scheme will require more than N page table entries. Why is multi-level paging still advantageous?

With a multi-level scheme, the size of each page table entry is smaller
Using more main memory improves system throughput
Processes do not use a contiguous range of pages, so more than N single-level page table entries would be required
Multi-level paging allows sharing of page tables among processes

Question 13 Multiple Choice (1 points)

Question: If it were necessary to have a page table entry for every page of virtual memory, multi-level page tables would take more memory than single-level page tables. Why is this not a problem?

A process does not need to have all of its pages in real memory at one time.
Processes do not use all of their virtual address space.
The page tables are kept on secondary storage.
Main memory is getting cheaper every year.

Question 14 Multiple Choice (1 points)

Question: Suppose the page table for the process currently executing on the processor contains the following data, where all numbers are in decimal, everything is numbered starting from zero, all addresses are memory byte addresses, and the page size is 1024 bytes.
virtual page number valid bit page frame number
0 1 3
1 1 4
3 0 -
4 1 2
5 1 1
6 0 -
What physical address, if any, would the virtual address 1042 correspond to?

none; a page fault would occur
1042
2066
3072
4114
5138
none of the above

Question 15 Multiple Choice (1 points)

Question: The abbreviation TLB stands for

transient linkage buffer
translation linkage buffer
translation lookahead buffer
translation lookaside buffer

Question 16 Multiple Choice (1 points)

Question: The resident set of a process is the portion of the process image (e.g., a set of pages or segments) that is in ______________ at a given time.

real memory
virtual memory
secondary storage
cache

Question 17 Multiple Choice (1 points)

Question: The technique implemented by the TLB is called

paging
segmenting
associative mapping
direct mapping
hashing
chaining

Question 18 Multiple Choice (1 points)

Question: What is the reason for having multi-level page tables?

To reduce the amount of real memory occupied by page tables
To reduce the amount of disk I/O that is needed to handle a page fault
To reduce the page fault frequency
To handle larger processes

Question 19 Ordering (1 points)

Question: Rank the following events in increasing order of the amount of time that it costs to handle the event.

hardware interrupt

page fault

TLB miss

cache miss

Question 20 True / False (1 points)

Question: Most systems store page tables in virtual memory.

True
False

Question 2		Fill in the Blank	(1 points)
	Question:	The condition where the system spends most of its time swapping data between main memory and secondary storage, to the extent that most of the CPU time is wasted waiting for the swapping device, is called

Question 3		Fill in the Blank	(1 points)
	Question:	The expectation that program and data references within a process tend to cluster is called the principle of

Question 4		Multiple Answer	(1 points)
	Question:	The motivations for implementing virtual memory include
		more processes may be maintained in main memory the processor may be used more efficiently, due to a higher degree of multiprogramming a process may be larger than all of main memory memory management is simplified

Question 5		Multiple Answer	(1 points)
	Question:	Which of the following are advantages of segmentation in a virtual memory?
		it reduces the page fault rate it simplifies the handling of growing data structures it allows handling larger programs it allows programs to be altered and recompiled independently it lends itself to sharing among processes it lends itself to protection

Question 11		Multiple Choice	(1 points)
	Question:	Given a fixed number of TLB entries, using a larger page size has the effect of
		improving TLB performance worsening TLB performance causing more page faults reducing the page fault rate none of the above

Question 12		Multiple Choice	(1 points)
	Question:	If a process only uses N pages of virtual memory, it seemingly would need only N page table entries, given a single-level paging scheme. Using a multi-level paging scheme will require more than N page table entries. Why is multi-level paging still advantageous?
		With a multi-level scheme, the size of each page table entry is smaller Using more main memory improves system throughput Processes do not use a contiguous range of pages, so more than N single-level page table entries would be required Multi-level paging allows sharing of page tables among processes

Question 13		Multiple Choice	(1 points)
	Question:	If it were necessary to have a page table entry for every page of virtual memory, multi-level page tables would take more memory than single-level page tables. Why is this not a problem?
		A process does not need to have all of its pages in real memory at one time. Processes do not use all of their virtual address space. The page tables are kept on secondary storage. Main memory is getting cheaper every year.

Question 15		Multiple Choice	(1 points)
	Question:	The abbreviation TLB stands for
		transient linkage buffer translation linkage buffer translation lookahead buffer translation lookaside buffer

Question 16		Multiple Choice	(1 points)
	Question:	The resident set of a process is the portion of the process image (e.g., a set of pages or segments) that is in ______________ at a given time.
		real memory virtual memory secondary storage cache

Question 17		Multiple Choice	(1 points)
	Question:	The technique implemented by the TLB is called
		paging segmenting associative mapping direct mapping hashing chaining

Question 18		Multiple Choice	(1 points)
	Question:	What is the reason for having multi-level page tables?
		To reduce the amount of real memory occupied by page tables To reduce the amount of disk I/O that is needed to handle a page fault To reduce the page fault frequency To handle larger processes

Question 20		True / False	(1 points)
	Question:	Most systems store page tables in virtual memory.
		True False