PPT Slide

• Interrupt Structure (continued)

  • If bit 1 of psw = 0, interrupts are masked (recorded but not taken until interrupts are re-enabled)
  • Only the Timer and Disk interrupts are maskable; the SysCall and ProgramError interrupts are unmaskable (will always generate an interrupt)
  • The Timer interrupt has a higher priority than the Disk interrupt
  • Note that the CRA-1 interrupt structure, while providing enough structure to demonstrate the intimate relationship between hardware and the OS, is pretty simplistic given most computers

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