PPT Slide
CRA-1 CPU (continued)
- 9 control registers:
- ia = instruction address register (Program Counter)
- psw = program status word (1 bit for system/user mode; 1 bit for interrupts enabled/disabled)
- base = per memory reference adder value
- bound = per memory reference upper bounds check
- iia = interrupt instruction address register; holds value of ia before an interrupt is taken
- ipsw = interrupt program status word; holds value of psw before an interrupt is taken
- ip = interrupt parameter register; info about last interrupt
- iva = interrupt vector address register; address of the interrupt vector table (jump table)
- timer = interrupt timer register (autodecremented once every µsecond); timer interrupt automatically occurs when timer reaches 0